DL Model Optimization 101 - Fundamentals of model compression for accelerating DL inference

G1-02

11.20(水) 11:30-12:10 | 展示会場内　RoomG

Thematic Seminar

DL Model Optimization 101 - Fundamentals of model compression for accelerating DL inference

As AI/DL technologies become more commoditized, there is a growing demand to apply DL technologies to in-house applications. However, DL inference generally requires a lot of computing resources, and it is not easy to run it on edge computing devices that have many constraints such as performance, cost, and power. This presentation will introduce basic knowledge and tools for optimizing and compressing DL models and improving DL inference performance for those who are concerned about DL inference performance.

Edge AI / Edge Computing

Speaker

AI Technology Specialist /

Intel Corporation.
Regional CoE & Platform Enabling
Edge Software Solution Specialist

Yasunori Shimura

Thirty years of engaging in developing and disseminating a wide range of computing technologies, from microcontrollers to x86 servers. Experienced a wide range of hardware design work, from circuit design and PCB artwork design to ASIC/FPGA logic design for microcontrollers. After working as an embedded application FAE for eight years at Intel, took a role of a technical specialist in image processing software and deep learning inference software for 11 years. Engaged in spreading the importance of software and technology. Also, involved in raising awareness and disseminating technology related to container-based application development in recent years. Also provides lectures and technical training in various locations using self developed contents. Also, disseminates technical information through web media, etc., and disseminates and disseminates technical information to many engineers.

Attendee Registration